University of Southern California Information Sciences Institute Power Aware Multiprocessor Architecture (PAMA)
University of Southern California Information Sciences Institute
Power Aware Multiprocessor Architecture (PAMA)
PAMA Quad Chart
New Ideas
Power Aware Multiprocessor Rapid Prototype
Multiprocessor Power Control Library
Node mode, variable clock speeds, and power-aware memory allocation
Power Aware Network
Variable topology
Variable data width
Variable clock speed
Improve power-aware multiprocessor prototype development time by factor of 10
Dynamic variation of multiprocessor power consumption by a factor of 100
UAV/LIDAR power-aware application development
